SBIR/STTR Research Award
VHDL Models for ATM Protocol Stack
Award amount
$99,950Program and phase
SBIR · Phase IAward year
1998Award details
- Awarding agency
- Department of Defense
- Branch
- Air Force
- Recipient company
- SYSTRAN FEDERAL CORP.
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- KN47KKNMWKQ9
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
Systran Corporation, a product development company with four product lines that are marketed worldwide, and EDAptive, are proposing to handle the task of developing models for the ATM protocol stack. We are proposing to develop all parameterized models that are required to meet the needs of a ATM systems designer. These parameterized models will be such that all the quality of service parameters can be computed easily for a given set of resources. Conversely, when the quality of service parameters are given, the resources that are required to sustain the quality of service can be computed. Special effort would be given to verify and validate the implemented models.
Technology keywords
Not reported
Other awards by this recipient
Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.
- Intrusion Sensitive Material
- AT Sensors for IC Use
- FN Composites
- Advanced Flexible Architecture for UWB Receivers
Research funding history
105 SBIR/STTR records share this UEI (1983–2008). Reported award amounts total $24,877,169. Reported amounts are not federal obligations.
Phases: Phase I, Phase II
Agencies: Department of Defense, Department of Commerce, National Aeronautics and Space Administration, Department of Energy, National Science Foundation