Digital Signal Processing Technology Transfer

Not Available This SBIR Phase I proposal is responsive to the Navy Precision Automatic Landing System (PALS) requirements for the new class of stealth aircraft carriers, designated as CVX. The PALS system must be at least functionally equivalent to ACLS+ and must meet the signature requirements of stealth CVX. The new DoD JPALS system, based on FAA LDGPS architecture, meets all the CVX requirements, however the vulnerability of GPS satellites signal- in-space to enemy jamming in battlespace environment presents a major concern. This proposal addresses this concern directly and proposes two levels of augmentation to JPALS: (1) an anti-jam augmentation to mitigate degradation in the receiver signal-to- noise power due to jamming and (2) a robust overlay signal architecture augmentation to address satellite's signal denial in worst case jamming. The Augmented JPALS, AJPALS, will be analyzed in Phase I through modeling and simulation and using experimental hardware measurements to validate the feasibility of AJPALS architecture. The Phase I program will also investigate the effects of these two levels of augmentation to JPALS in meeting the guidance requirements for shipboard CAT II landing. The Phase II program will implement and demonstrate the AJPALS architecture and will develop design-to-cost goals for this product in the context of both military and commercial viability.