MULTI-MODE N-MODULAR REDUNDANT (FAULT TOLERANT) COMPUTER

IRVINE SENSORS CORPORATION (ISC) PROPOSES A NEW DESIGN FOR A RADIATION HARDENED RECONFIGURABLE FAULT TOLERANT COMPUTER SUITABLE FOR NEXT GENERATION BM/C3I SYSTEMS. THE COMPUTER WILL COMPRISE 4 IDENTICAL MICROPROCESSORS, I/O AND MEMORY, AND WILL BE CAPABLE OF IMPLEMENTING MULTIPLE FAULT TOLERANT CONFIGURATIONS (MODES) INCLUDING: LOCK-STEP SHADOW, DUAL LOCK-STEP SHADOW, LOCK-STEP SHADOW WITH TIE-BREAKER (PSEUDO-TMR), TRIPLE MODULAR REDUNDANCE (TMR) AND QUAD MODULAR REDUNDANCE (QMR). THE FAULT TOLERANCE WILL BE PROGRAMMABLE AT BUILD, INSTALLATION, INITIALIZATION, OR MISSION TIME(S). BY TAKING ADVANTAGE OF A UNIQUE NEW APPROACH TO 3-DIMENSIONAL PACKAGING, THE ENTIRE FAULT TOLERANT COMPUTER WILL BE PACKAGED WITHIN THE ENVELOPE OF A SINGLE (CURRENT DAY) PROCESSOR, WILL REQUIRE ONLY 25% TO 50% ADDITIONAL POWER, AND WILL HAVE SIGNIFICANTLY HIGHER RELIABILITY AND THROUGHPUT. WHILE THE CONCEPT IS EXTENSIBLE TO ANY COMPUTER, IN ORDER THAT IT BE FULLY DEVELOPED AND TO TAKE ADVANTAGE OF THE BUILT IN ERROR DETECTION CAPABILITY, AND TO PROVIDE MAXIMUM NEAR-TERM MILITARY APPLICABILITY, ISC PROPOSES THAT THE GVSC OR SIMILAR TYPE CHIP SET BE UTILIZED IN THE STUDY/DEMONSTRATION. IN PHASE I, ISC PLANS TO DEVELOP PRELIMINARY SPECIFICATIONS FOR A PHASE II BREADBOARD DEMONSTRATION UNIT, INCLUDING POWER, WEIGHT, VOLUME, AND THERMAL LOAD ESTIMATES.