Advanced VCSEL Packaging

Not Available The proposed innovation is the development of a cost efficient, high-resolution CMOS APS digital camera-on-a-chip for ballistic missile defense applications, providing early warning of attack, target detection, classification and tracking. A proprietary innovative APS design allows Photobit to attain the world's smallest pixel size. It is a high performance, low power, compact and cost efficient CMOS image sensor technology that provides resolution, sensitivity and dynamic range competitive with CCDs yet offers significant system advantages. In Phase I, optimal architectures will be investigated to achieve both excellent image quality and a reasonable chip size. The technical feasibility will be studied of obtaining an ultra-high resolution that conforms to 4Kx4K focal plane array with a density of almost 300lines/mm (3.5x3.5mm pixel size), a dynamic range of over 60dB(10bit), a frame rate of up to 30Hz, and an output data flow of around 5Gbit/sec. The main circuitry to implement the 16Mpixel camera-on-a-chip will be designed and simulated. The physical layout of entire imager will be determined. The possibility of increasing the resolution to 400lines/mm (6Kx6K pixel array) by decreasing the pixel size to 2.5x2.5mm using 0.25mm CMOS process will be investigated. Special considerations for on-chip image processing and data coding will be suggested.