Radiation Hardened SRAM Based Reprogrammable FPGA

The objective of this proposal is to develop a truly strategic radiation hard SRAM-based (i.e., re-programmable) Field Programmable Gate Array, FPGA. Such a chip would substantially reduce the cost and time-to-market to develop advanced radiation hardsystems. The chip will be manufactured in an advanced silicon-on-sapphire (SOS) technology called Ultra Thin Silicon (UTSi) CMOS. This advanced technology has proven itself in rad hard RFIC's, with especially high tolerance to transient radiation effects(SEU, flash XRAY, etc.). With this proposal, the benefits of this technology will be brought to bear on digital applications and new approaches to designing rad hard systems will be made available to the market. The significance of this project is thatmodern satellite and radiation hard systems are increasingly dependent on digital components, often made as application specific integrated circuits, ASICs. The ASIC approach requires a custom chip to be designed and fabricated at great expense in time andmoney. This proposal would lead to development of a long-sought digital solution based on a re-programmable FPGA architecture. While re-programmable (SRAM) FPGA's are commonplace in commercial markets, they are susceptible to transient radiation effectsthat make them unsuitable for rad hard applications. By creating an SRAM FPGA on UTSi CMOS, satellite and rad hard applications, which in turn will substantially reduce development time and costs of satellite and weapons systems.