SBIR/STTR Research Award

DIGITAL GAIN CONTROLLED INSTRUMENTATION AMPLIFIER - A GENERIC MIXED MODE IC FOR DATA CONDITIONING

Award identifier c25c29c7cdc493fb2d667431e905e3c9226359e0be836e798779946e6fb81a41Awarding agency Department of Defense · Army

Award amount

$500,000

Program and phase

SBIR · Phase II

Award year

1994

Explore This Research Award in CaptureIQ

Research the technology, evaluate the recipient and agency, identify related opportunities, and explore potential follow-on work with CaptureIQ.

Award details

Awarding agency
Department of Defense
Branch
Army
Recipient company
Systems & Processes Engineering Corporation
Proposal award date
Not reported
Contract end date
Not reported
UEI
M5JVFYWW75P1
Solicitation number
Not reported
Topic code
Not reported

Research abstract

SYSTEMS & PROCESSES ENGINEERING CORPORATION (SPEC) HAS DEVELOPED A DIGSYSTEMS & PROCESSES ENGINEERING CORPORATION (SPEC) HAS DEVELOPED A DIGITAL GAIN CONTROLLED INSTRUMENTATION AMPLIFIER ASIC SYSTEM DESIGN FOR ITAL GAIN CONTROLLED INSTRUMENTATION AMPLIFIER ASIC SYSTEM DESIGN FOR INTERFACING A TRANSDUCER TO AN ANALOG-TO-DIGITAL CONVERTER. THIS ASICINTERFACING A TRANSDUCER TO AN ANALOG-TO-DIGITAL CONVERTER. THIS ASIC BUILDING BLOCK WILL FULFILL THE ARMY'S REQUIREMENTS FOR GENERIC MIXED BUILDING BLOCK WILL FULFILL THE ARMY'S REQUIREMENTS FOR GENERIC MIXED MODE INTEGRATED CIRCUITS FOR DATA CONDITIONING THE PROPOSED GENERIC M MODE INTEGRATED CIRCUITS FOR DATA CONDITIONING THE PROPOSED GENERIC MIXED MODE ASIC CONSISTS OF A PROGRAMMABLE GAIN CONTROLLED AUTO-ZERO INIXED MODE ASIC CONSISTS OF A PROGRAMMABLE GAIN CONTROLLED AUTO-ZERO INSTRUMENTATION AMPLIFIER, AN ANTI-ALIASING FILTER, A LOW OUTPUT IMPEDANSTRUMENTATION AMPLIFIER, AN ANTI-ALIASING FILTER, A LOW OUTPUT IMPEDANCE BUFFER, AND POWER DOWN CIRCUIT. IN THE PHASE I PROGRAM, SPEC PROPOSCE BUFFER, AND POWER DOWN CIRCUIT. IN THE PHASE I PROGRAM, SPEC PROPOSES TO DESIGN, LAYOUT AND SIMULATE AN ASIC DIGITAL GAIN CONTROLLED INSTES TO DESIGN, LAYOUT AND SIMULATE AN ASIC DIGITAL GAIN CONTROLLED INSTRUMENTATION AMPLIFIER TARGETABLE TO CMOS TECHNOLOGIES. THE PERFORMANCRUMENTATION AMPLIFIER TARGETABLE TO CMOS TECHNOLOGIES. THE PERFORMANCE OF CMOS ANALOG CIRCUITS IS COMPARABLE TO THEIR CONVENTIONAL BIPOLAR E OF CMOS ANALOG CIRCUITS IS COMPARABLE TO THEIR CONVENTIONAL BIPOLAR COUNTERPARTS, WHILE MAINTAINING THE ADVANTAGE OF LOWER POWER DISSIPATICOUNTERPARTS, WHILE MAINTAINING THE ADVANTAGE OF LOWER POWER DISSIPATION. SPEC'S ASIC DESIGN CENTER HAS AN EXPANSIVE CAE ENVIRONMENT FOR TAON. SPEC'S ASIC DESIGN CENTER HAS AN EXPANSIVE CAE ENVIRONMENT FOR TARGET MULTIPLE IC TECHNOLOGIES AND FOUNDRIES FOR FUTURE IMPLEMENTATIONSRGET MULTIPLE IC TECHNOLOGIES AND FOUNDRIES FOR FUTURE IMPLEMENTATIONS OF THE GENERIC MIXED MODE ASIC'S. OF THE GENERIC MIXED MODE ASIC'S.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Research funding history

206 SBIR/STTR records share this UEI (1987–2025). Reported award amounts total $59,199,771. Reported amounts are not federal obligations.

Phases: Phase I, Phase II, Phase II – Direct to Phase II

Agencies: Department of Defense, National Aeronautics and Space Administration, Department of Homeland Security, Department of Energy, Environmental Protection Agency, National Science Foundation

Agency intelligence

Department of Defense

Back to SBIR/STTR Research Awards

Don't take our word for it. Ask AI about RFPCapture.

See what leading AI assistants have to say about RFPCapture and CaptureIQ.

Gemini opens without a prefilled question. The question is copied to your clipboard when the button works. You can also copy it here:

What is RFPCapture.com and its CaptureIQ platform from Smart Logic AI? How does it help federal contractors discover opportunities, evaluate bid/no-bid decisions, research government contracts, and prepare proposals? How does it compare with other federal capture platforms? Use independent sources where available.