SBIR/STTR Research Award

Ultrahigh-Dynamic Range Photonic-Assisted Direct Digitization Receiver

Award identifier e4b409a6bafe63f7fe3e77176a220d8a87c352ca48c3b390c7237eaa561db4f6Awarding agency Department of Defense · Navy

Award amount

$1,095,286

Program and phase

SBIR · Phase II

Award year

2025

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Award details

Awarding agency
Department of Defense
Branch
Navy
Recipient company
Critical Frequency Design, LLC
Proposal award date
2024-12-19
Contract end date
2026-06-19
UEI
E2DHYME6B1T6
Solicitation number
Not reported
Topic code
N241-D01

Research abstract

FD has completed a comprehensive study and proof of concept demonstration of an ultrahigh?dynamic range photonic-assisted direct digitization receiver called a Phase-Modulated Analog to Digital Converter (PM-ADC). The receiver architecture is compatible with fiber remoting of antenna signals from harsh environments, can be integrated into miniscule hybrid opto-electronic modules, and enables direct digitization and software-defined processing of large Instantaneous Bandwidths (IBWs). Whereas existing commercial Analog to Digital Converters (ADCs) require Low-Noise Amplifiers (LNAs), consume large amounts of electrical power at the antenna, and have limited Effective Number of Bits (ENOB) or Dynamic Range (DR), the proposed PM-ADC solution exceeds State of the Art (SoA) commercial ADC ENOB performance by up to 4.7 bits (~28.3 dB or 675X DR) depending on signal frequency and requires no active power or dissipation at the antenna site. With fiber remoting, multiple channels can be digitized with sufficient DR to handle co-site interference without desensitizing or distorting the receiver and the main electronics module can be integrated in more amenable locations with access to power, cooling, and maintenance.The basic architecture and block diagram for PM-ADC is as shown in Fig. 1. Similar PM-ADC architectures have been disclosed in the public literature1,2,3, but we have expanded system integration knowledge to leverage recent advances in low half-wave voltage (Vp) integrated photonic PMs, cryogenic ADCs, and DSP to overcome prior limitations of the approach and enable unprecedented levels of ADC performance up to the timing jitter noise limits (i.e. it reduces the noise floor [NF]). As described, lowering the PM-ADC NF involves a multi-pronged approach: 1) reducing ADC, input and output thermal noise through cryogenic cooling, 2) designing a custom PM with a low Vp, sufficient optical power Psig, low enough phase matching t, and low enough laser linewidth fLW, and 3) increasing the impedance of the RF input terminal to produce more voltage and signal for the same amount of coupled energy.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Research funding history

13 SBIR/STTR records share this UEI (2020–2025). Reported award amounts total $10,360,551. Reported amounts are not federal obligations.

Phases: Phase II, Phase I

Agencies: Department of Defense

Agency intelligence

Department of Defense

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