SBIR/STTR Research Award

Radiation Hardened, Programmable Battery Analog Front-End ASIC

Award identifier 99a12cae815d34daae117795c89d4e52e6548db081059dd3283cfa94d18440dfAwarding agency National Aeronautics and Space Administration

Award amount

$899,958

Program and phase

SBIR · Phase II

Award year

2024

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Award details

Awarding agency
National Aeronautics and Space Administration
Branch
Not reported
Recipient company
Alphacore, Inc.
Proposal award date
2024-07-27
Contract end date
2026-07-26
UEI
CXMPDDLFBCH3
Solicitation number
SBIR_23_P2
Topic code
S13

Research abstract

In response to NASArsquo;s S13.07 SBIR solicitation, Alphacore will develop a radiation-hardened, high accuracy Battery Analog Front-End (B-AFE) Application Specific Integrated Circuit (ASIC) that can implement low-noise, high dynamic range, low-offset offset-drift Coulomb Counting (CC), high precision temperature and terminal voltage measurement embedded with Electrochemical Impedance Spectroscopy (EIS). The B-AFE ASIC will be programmable and flexible to support various energy density (gt;200 Wh/kg and gt;200 Wh/l) and battery state estimation approaches. Alphacore will leverage existing designs and evaluation results to develop a CMOS-based, radiation-hardened (to 1 Mrad total ionizing dose) Coulomb counting Sigma;Delta; ADC-based ASIC. To significantly improve the radiation tolerance, Alphacore will implement the battery monitoring circuitry in the XFAB 180nm high-voltage (HV) silicon-on-insulator (SOI) process. SOI processes are known to provide excellent benefits in terms of SEEs, but TID has been a problem. Alphacore has already fabricated and TID tested three important building blocks of the system, LDO, BGR and Flyback converter and hardness beyond 300krad(Si) was proven. Phase II efforts will focus on layout, integration and CMOS fabricating and testing of the designed CC and EIS system IC, incorporating necessary risk reduction tests, detailed design reviews, and test plans. The principal Phase II deliverable will be a prototype B-AFE system provided to NASA for reliability and durability testing. The CC+EIS concept developed in Phase I will be adapted to full-size cells to assess system capabilities over a dynamic range of charge/discharge cycles. Long-term testing, following NASA ESTA standards, will be employed to evaluate the safety and performance of the full-scale design. During Phases II and III, algorithm development for SoC estimation of Li/CFx primary cell batteries will commence, utilizing direct calculation, model-based, and data-driven approaches. nbsp;

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

155 SBIR/STTR records share this UEI (2013–2026). Reported award amounts total $63,784,604. Reported amounts are not federal obligations.

Phases: Phase I, Phase II, Phase II – Direct to Phase II

Agencies: Department of Defense, National Aeronautics and Space Administration, Department of Energy, Department of Commerce

Agency intelligence

National Aeronautics and Space Administration

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