High temperature non-volatile memory prototype

This Small Business Innovation Research (SBIR) project will develop the world’s first non-volatile memory (NVM) that can operate at high temperatures of > 250 °C.  The DoD has invested significantly wide band gap semiconductor-based transistors (ex. GaN, SiC) which are capable of operating at high temperatures, but lack of memory continues to be the biggest bottleneck in deploying advanced computing.  This weak link will severely limit the intelligence that is deployable to future DAF, SF and DoD strategic systems. Cerfe Labs has demonstrated its Non-Volatile Memory (NVM) working at 300 °C, retaining data for >100 hours at 500 °C, and static radiation immunity up to 1 MRads of gamma radiation. The NVM operates by novel physics to enable extreme high temperature operation not available from memory technologies in production.  This project will build prototypes from this technology to enable extreme environment testing beyond our present capabilities in order to demonstrate the true potential of this technology. This project will move the TRL forward and develop reliable memory compatible with the aforementioned harsh environment transistor technologies. The importance of this project is further validated by three letters of support from DoD suppliers of harsh environment electronics and by a letter of commitment from a DoD supplier of wide bandgap semiconductor wafers to help transition CeRAM into DAF/SF-relevant products (phase III). Cerfe Labs has been working with the University of Texas at Dallas (UTD) for two years under a research services agreement. Cerfe Labs’ employees and students are trained on the tools required for execution of this project. Cerfe Labs has demonstrated technical feasibility of this proposal and developed a clear understanding of the cost and timelines required.  If funded, this project will support additional students and staff and enable the more advanced prototype development while also contributing to workforce development in this critical technology area for the AF/SF. The work proposal is divided into three parts. In the first part, Cerfe Labs will design and develop 32-bit prototypes at the UT Dallas cleanroom. In the second part, these prototypes will be heterogeneously integrated with GaN, in collaboration with a DoD supplier of this technology, and other COTS transistors, on an evaluation board and undergo extensive testing. Cerfe Labs will work closely with the DoD end-customers to design DoD-relevant, application-specific tests including operating temperatures, retention times, and types and amounts of radiation dosage. This project will culminate in a detailed plan for future integration of Cerfe Labs’ memory into existing GaN or SiC process flows, which will be used to design commercial as well as military products with significant improvements in strategic harsh environment capabilities.