Direct etched silicon wafer surface activated bonding and vacuum sealing for Micro-Electromechanical Systems (MEMS) and devices.

Advance packaged electronics and defense power electronics require highly integrated MEMs, sensors, and power electronics.Ā Particularly, MEMS sensors are more frequently being considered as alternatives to conventionally machined sensors in order to meet performance requirements in a low size, weight, and power (SWaP) package. For advanced integrated MEMs manufacturing with high reliability, wafer bonding is an important and key technology that will allow 3D integration of devices. Wafer bonding can be used for integration of the electronic components with the mechanical, optical components, waveguides, mirrors in a single, wafer-level process step. However, wafer bonding with etched MEMs wafers brings new challenges due to very strict requirements in surface flatness, smoothness, geometrical constraints, complexity of the MEMS devices, process temperature and contamination. Currently, direct silicon wafer bonding is employed, however, it necessitates high standards in both surface geometry and roughness. Etched silicon wafers are often not considered for direct wafer bonding because of those standards. Adhesion layers, such as a eutectic metal layer, can overcome the stringent geometry standards required for direct bonding, but the thermal expansion (coefficient of thermal expansion (CTE)) mismatch between the adhesion layer and the silicon device will lead to performance impacts for high stability sensors, such as micro-cracking, long-term creep, and interface debonding. In this SBIR Phase I proposal, we address challenges identified and proposed innovative solutions for etched MEM wafer bonding. This will lead to further advance in the MEMs packaging technology. Our innovative approaches include development of desired surface processing conditions and bonding layers that can chemically, structurally, and thermally match to bonding substrate. Our method of integrating the technology is novel, unique and it will allow in-situ wafer bonding.Ā This technology could also be used for hermetic sealing/packing of MEMs mimicking additive manufacturing for direct wafer bonding. We have processing capabilities that are beyond standard commercial bonding tools available currently in the market. Our technology will present the Navy/DoD with an aggressive approach to produce very high-performance power electronics.