SBIR/STTR Research Award

High-G Clock Source

Award identifier 0fd5c8849379747d091eacf40f1d9bd71a3e97ab15355b42e3a27c3cd42c4ae3Awarding agency Department of Defense · Defense Microelectronics Activity

Award amount

$196,821

Program and phase

SBIR · Phase I

Award year

2023

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Award details

Awarding agency
Department of Defense
Branch
Defense Microelectronics Activity
Recipient company
ESC AEROSPACE US, INC
Proposal award date
2023-08-22
Contract end date
2024-02-22
UEI
SUR9AK1VMNM1
Solicitation number
23.1
Topic code
DMEA231-002

Research abstract

At the center of most operational systems is TIME. Time enables us to communicate, to synchronize, to control, and to position. An accurate, reliable, low size, weight and power timing source is critical to our esc Aerospace PNT solution NavXTM for accurate and reliable PNT in total GPS denial. However, it is equally critical in a vast number of military and commercial applications. Historically, Ceramic Resonators were low cost, but with a large physical footprint, which were acceptable for large munition HOB sensors. However, as fuzing technology is being applied to smaller munitions, the Ceramic Resonators are too large to accommodate the Size, Weight, Power, and Cost (SWaP-C) requirements, while low cost crystal oscillators cannot meet the high-G rating of fuzing. Current applications show timing sources surviving peak acceleration forces of up to 65 kG for about 100µs, after that the acceleration tails off exponentially. Having a clock source surviving up to 100 kG is desired. The sensitivity of quartz crystal oscillators to acceleration has been well documented. Research on crystal oscillators has resulted in a quartz crystal oscillator that exhibited G-sensitivity (change in frequency resulting in acceleration force) of 2E-9/g. Also, research on different MEMS oscillators have also shown low-G sensitivity. However, this topic requires development to be done on survival shock.  In this project, we propose to develop an integrated micro-scale sized resonator and oscillator solution that can tolerate up to 120 kG force while maintaining high clock accuracy. The resonator design will be carried out using miniaturized quartz crystal microbalance (QCM) architecture with higher tolerance to force and pressure. The oscillator design will be carried out using robust subthreshold analog circuit design technique to reduce the size and power consumption of the oscillator. With this technique we anticipate that the power consumption of the oscillator will be less than 100µW or 0.1mW. Our solution will also include an on-chip oscillator (integrated on a CMOS chip) with temperature variation of 10ppm/oC, that can lock to the reference frequency provided by the QCM oscillator. The on-chip oscillator can provide an optional on-chip clock source during events of high force. Owing to the design being integrated on-chip, it will not vary due to force.​​​​​​​

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

12 SBIR/STTR records share this UEI (2018–2025). Reported award amounts total $3,546,505. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: Department of Defense

Agency intelligence

Department of Defense

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