THz Heterogeneous Integration for Next generation Communications (THINC) Phase 2

This proposal introduces a novel semiconductor manufacturing approach to fabricate mm-Wave analog circuits that will enable future 5G and 6G communication networks to expand their bandwidth by orders of magnitude at an energy efficiency and cost structure that supports rapid proliferation. The benefits of advanced networking have far reaching implications including improved manufacturing efficiency broadly (with more informed processes) as well as enabling less intensive use of daily resources by, for example, enabling telecommuting. The proposed effort combines high performance compound semiconductors with silicon-scale manufacturing to realize a “beyond Moore’s Law” capability for heterogeneous integration. This combination of technologies is critical and timely. Compound semiconductor device technologies including Indium Phosphide, Gallium Arsenide, and Gallium Nitride offer tremendous potential for higher energy efficiency and output power at millimeter-wave bands that exceed the capability of conventional silicon processes. In particular, Indium Phosphide heterojunction bipolar transistors are the fastest semiconductor transistors that have been demonstrated but remain niche to a few millimeter-wave applications due to the inability to scale to an 8” manufacturing process. Conversely, Silicon technology has scaled to 12” manufacturing and achieves low cost for high volume markets but has fundamental performance limits. Each of these foundry models is also segregated by their specific markets. This proposal describes an approach that will add flexibility to millimeter-wave integrated circuit manufacturing that can be realized at a fraction of the direct investment than would be needed for conventional process evolution and with the ability to deliver circuits into the terahertz frequency regime. The central heterogeneous integration innovation is a pseudolithic integrated circuit built from compound semiconductor transistors integrated onto a silicon interposer. Therefore, the chip comprises various transistor chiplets that need not be from a single device technology. Furthermore, the interposer offers a low-cost alternative for integration of digital components in close proximity with analog components. The approach can tap into the available compound semiconductor facilities based in the domestic semiconductor industry and build heterogeneous solutions within a US-centric manufacturing model. Phase II will integrate an Indium Phosphide transistor into silicon and demonstrate that ultra-high frequency performance at frequencies as high as 80 GHz, exceeding the capability of current silicon CMOS foundries. Successful selection for a Phase II award would address a design for manufacturability study through a multi-transistor analog integrated circuit including millimeter-wave power amplifiers to accelerate manufacturing of solutions for base station and backhaul communications enabling market penetration by 2028. Beyond the communications market, the heterogeneous integration capability will broadly address and grow the millimeter-wave market well beyond its anticipated $25B market by the end of the decade.