High Sample Rate Analog to Digital Converters for Reconfigurable Phased Array Applications

The Muir2 transceiver chiplet has been designed by Jariet Technologies on the DARPA MIDAS program as a TA1 effort.  The chiplet is now awaiting fabrication and testing, which is the thrust of this proposed SBIR Phase II program. This chiplet integrates thirty-two sets of receive and transmit channels, including the amplifiers, RF-to-IF mixers, local oscillator (LO) generators, IF filters, analog-to-digital and digital-to-analog converters, decimation and interpolation logic, and beamforming logic.  The chiplet, while implementing all of these functions for thirty-two millimeter wave RF transceiver channels, is extremely compact at 9.65 by 9.90 millimeters enabling it to be used in applications as high as 50 GHz while maintaining half-wavelength antenna element spacing and allowing a very wide scan angle. The Muir2 chiplet design represents aggressive research that we believe through simulation and analysis has achieved state-of-the-art integration, performance, and power dissipation. The proposed Phase II fabrication and testing work will permit this revolutionary new circuit design to be validated and key lessons learned that will permit further optimizations as a next step in transitioning this initial prototype design to future volume production.  The chiplets produced will be able to be integrated into next-level system prototypes to facilitate further R&D of system architecture and design, and to permit the development of application-specific demonstrations of the technology. Application targets for this technology include SatCom, radar, and electronic warfare systems, as well as future 5G/6G commercial wireless communications systems.  The proposed Phase II effort to realize this chiplet hardware and perform chiplet-level as well as system level validation testing will provide a solid basis for commercialization of the technology as a next step.  The objective of this proposed program is to fabricate, bring-up, test, and perform verification/validation testing on the Muir2 chiplet so that it may be perfected for future commercialization across a range of applications.