SBIR/STTR Research Award
High-Sample Rate Analog to Digital Converters for Reconfigurable Phased Array Applications
Award amount
$154,948Program and phase
SBIR · Phase IAward year
2016Award details
- Awarding agency
- Department of Defense
- Branch
- Defense Advanced Research Projects Agency
- Recipient company
- Alphacore, Inc.
- Proposal award date
- 2016-04-05
- Contract end date
- 2017-04-21
- UEI
- CXMPDDLFBCH3
- Solicitation number
- 2015.3
- Topic code
- SB153-004
Research abstract
This SBIR Phase I proposal requests support for Alphacore, Inc. to design and characterize a 40Gsps (giga-samples per-second), 7-bit (ENOB > 6 bits), low-power (<500mW) analog-to-digital converter (ADC) for use in configurable phased array applications in the defense sector.The proposed ADC employs an innovative topology with high-bandwidth front-end sampling circuit combined with an interpolated flash-type ADC. Innovative and effective digital calibration is used to guarantee spurious free Nyquist frequency band which is an important requirement in phased array applications.The design will be implemented in a 28nm fully depleted silicon on insulator (FDSOI) CMOS technology.The maximum sampling rate of Alphacores ADC is 48 GS/s, resolution is 7-bits (effective number of bits, ENOB = 6.0 bits) and the power consumption is 480mW, not counting the consumption of the output interface. The ADC has analog input bandwidth of 33GHz. The sampling speed, ENOB and power have all been measured from transistor level schematic simulations, and are to a large part based on netlists extracted from layouts.
Technology keywords
Not reported
Other awards by this recipient
Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.
- Cryogenic High-Speed Modulator with Non-volatile Tunability in Commercial Silicon Photonics
- Novel Imaging Technologies for Optimized Lunar Surface Navigation
- ML Based Intelligent Filter with Real Time Calibration of Transmitter (MIR-CAT)
- Radiation Hardened GaN Monolithic Integrated Circuits for Power Conversion
- SF241-0021 High Speed Optical Interconnects for Efficient Intra-Satellite Data Transfer in the Space Environment
Awards with the same topic code
Verified by an exact topic code match. This is not a text-similarity match.
- High Sample Rate Analog to Digital Converters for Reconfigurable Phased Array Applications
- High-Sample Rate Analog to Digital Converters for Reconfigurable Phased Array Applications
- High-Sample Rate Analog to Digital Converters for Reconfigurable Phased Array Applications
- High-Sample Rate Analog to Digital Converters for Reconfigurable Phased Array Applications
- High-Sample Rate Analog to Digital Converters for Reconfigurable Phased Array Applications
Research funding history
155 SBIR/STTR records share this UEI (2013–2026). Reported award amounts total $63,784,604. Reported amounts are not federal obligations.
Phases: Phase I, Phase II, Phase II – Direct to Phase II
Agencies: Department of Defense, National Aeronautics and Space Administration, Department of Energy, Department of Commerce