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Award details
- Awarding agency
- Department of Defense
- Branch
- Navy
- Recipient company
- EXPEDITION TECHNOLOGY, LLC
- Proposal award date
- 2022-06-06
- Contract end date
- 2023-09-05
- UEI
- HQEEBV8CDJV3
- Solicitation number
- 22.1
- Topic code
- N221-071
Research abstract
Wideband digitizers produce copious data samples that need considerable interface bandwidth to transport and distribute real-time data to heterogeneous compute resources performing signal analysis. The initial signal analysis component, signal detection for example, will indicate that a signal of interest (SOI) is present, but further actions are required to produce detailed signal analysis results. This need to perform subsequent processing necessitates the recovery of wideband data samples associated with the detected signal before, during and after its presence. The task of managing and distributing the high data volume of wideband systems is addressed by a focused subsystem that time indexes and stores the incoming data samples and later recovers data segments corresponding to SOI activity. The simplistic solution of continuous data storage requires either an expensive bulk storage solution, which fills up very quickly, or an immediate data reduction via channelization and processing, resulting in the storage of only a portion of the total data bandwidth. Neither of these solutions enable the timely recovery of the raw data samples that provide the maximum information content and the most flexibility for subsequent processing. In contrast, an embedded circular buffer approach enables a wideband detection system to cue on specific events and direct data to additional processing specific to the signals and events of interest. An efficiently managed FPGA based buffering subsystem can be tailored to the targeted signal parameters, scenarios, and environments while having reasonable cost, hardware, and power demands. Expedition Technology proposes the development of a Forensic Memory System (FMS) that will accept wideband digitized input, place the samples in an indexed time-tagged memory, and retrieve blocks of time/frequency/bandwidth data segments corresponding to signals of interest. The solution is an embedded real-time approach that leverages field programmable gate array (FPGA) technology to provide high performance interfaces, access to bulk memory, and management of the data buffering. For example, when a sensor system observing RF spectrum detects a particular event in the wideband context (through scanning or other detection), the Forensic Memory System FPGA receives the detection parameters, retrieves the wideband samples, filters, channelizes the samples for the desired processing, and forwards this significantly reduced quantity of data to the appropriate processing resource.
Technology keywords
Not reported
Other awards by this recipient
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Awards with the same topic code
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Research funding history
35 SBIR/STTR records share this UEI (2014–2025). Reported award amounts total $21,960,379. Reported amounts are not federal obligations.
Phases: Phase I, Phase II
Agencies: Department of Defense
Agency intelligence
Department of Defense
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