Design and development of the HPSoC - High Pitch digitizer System-on-Chip

Next generation HEP experiments require detection of many interactions in very small volumes with unprecedented timing (at the ps level) and spatial accuracy (at the few 10 ?m level). Significant advancement on the sensor arrays (for example LGADs) promise to deliver in all these performance dimensions. Existing readout approaches use a TDC/Time-over-threshold based measurement. In this project, we will instead pursue an approach based on full waveform digitization, that allows for precise measurement of charge for sub-pixel spatial resolution, correct for pile-up, sensor aging, radiation or other environmental dependence, and provide accurate timing in presence of other causes of errors (timewalk, baseline wander, waveform shape variation). Mainstream continuous ADC systems are impractical for space, cost, and power reasons, and existing waveform sampling devices are not scaled to the low pitch necessary to interface with the advanced sensor arrays. Furthermore, to properly utilize full waveform information and avoid the bottleneck of large data transfer, it is necessary to provide computationally intensive calculations as close to the source as possible. We propose to design and make commercially available the “HPSoC”: a high channel density System-on-Chip capable of interfacing directly with state-of-the-art optical sensors (e.g. AC-LGAD), perform autonomous digitization, feature extraction, and data fusion to deliver interaction timing and position with a high degree of accuracy. The HPSoC device will also have internal calibration and monitoring circuitry. Finally, the design will have a modular structure and will be designed for easy integration as a compact module with a simple standardized readout interface. Design and development of the advanced HPSoC chip using a bottom-to-top approach, identifying the most challenging parts and design and testing and de-risking them. The outcome will be a working set of designed parts such that a full chip design can be pursued in Phase II. This device can be used by scientists in high-energy and nuclear physics experiments for fast analog data acquisition. Also, it has applications in general-purpose instrumentations and medical/PET imaging, possibly bundled with other types of sensing devices (photomultipliers). We anticipate being able to sell the device as an OEM manufacturer, provide associated design services or license it to a larger device manufacturer due to the low cost and low power nature of the design, which will give us a competitive edge.