Next Generation Small-SWaP SAR

In Phase I of this SBIR, PI2 and Centauri will work towards the goal of 75% SWaP reduction in the current Navy SAR approach with large GPUs by leveraging the RAPS open architecture SAR processor running Navy algorithms on current and next generation embedded GPU SoC devices. We will perform a trade study, risk-reduction demonstration, concept design through SRR, roadmap development , PDR in the Phase I Option, and detailed plans for Phase II. If selected to proceed with Phase II and beyond, the PI2 team will build the Small-SWaP SAR processor for Navy airborne applications, and plan for a roadmap towards next-generation technology SAR processing chips, and the potential to create a multimodal processor for other ISR sensors, EW processing, and successful commercialization.