Computational Pixel Imager (CPI) Readout Integrated Circuits for Next Generation High Performance and Low SWaP Sensors

Computational Pixel Imager (CPI) technology enables advanced capability for smaller satellites with reduced size, weight and power (SWaP) for missions such as Earth science. nbsp;We will develop an advanced CPI readout integrated circuit (ROIC) that can be mated to various detector materials from shortwave through very longwave infrared (SWIR ndash; VLWIR). nbsp;We use the Landsat 9 Thermal Infrared Sensor 2 (TIRS-2) as a boilerplate example for the benefits of the technology. nbsp;Using CPI technology, the performance of the TIRS could be improved significantly while also reducing the mechanical complexity of the sensor system. nbsp;Alternatively, it may be possible to build a smaller, simpler, less expensive sensor with the same performance as TIRS-2. nbsp; We will develop a 640x512 format, 20?m pixel pitch ROIC design, compatible with HOT infrared detectors to offer significant performance benefits for future NASA missions such as Landsat TIRS. nbsp;We will develop the architecture for performing on-chip TDI with high dynamic range using HOT LWIR detectors. nbsp;The architecture will support: -nbsp;High dynamic range - to accommodate the LWIR background and dark current pedestal, which could be high using HOT detectors. -nbsp;Dual band ndash; 2 optical bands can be supported simultaneously with 2 independent frontends and ADCs per pixel -nbsp;On-chip TDI scanning ndash; Up to 512 rows of TDI gain can be accomplished while scanning without the need to readout the image sensor to accumulate data in a separate processor.nbsp; -nbsp;Pseudo simultaneous dual band scanning ndash; Both bands will be accumulated on-chip, and with high dynamic range at the same time.We will develop the architecture and design the ROIC in this program. nbsp;We will develop, fabricate, and characterize test chips to support the design and validation of the full format ROIC. nbsp;Although the program will result in a fully functional ROIC design, funding limits will not allow us to fabricate the ROIC. nbsp;Also, we will not specially design a Rad-Hard device in this program.