Dynamic Frame Rate Throttling

The primary objective of the proposed effort is to evaluate low-light performance improvements in state-of-the-art Si:CMOS sensors using Temporal binning (frame rate throttling) and Spatial binning (pixel area aggregation). The Sage / SRI team will use existing image modelling techniques and sensor testing rigs to analyze and evaluate various options to lead to a recommendation for Phase II. The foundation for this analysis will be the body of work performed by SRI on multiple integrated circuits, sensors and camera systems. Included in this experience base are Low Light Level Cameras and CMOS chip technologies for other sponsors and programs, including IVAS among others. It is important to note, however, that SRI has contributed to Sage well beyond the basic sensor and camera technologies in developing helmet mounted systems for Warfighter evaluation. Imagery not obtainable solely from a camera has been successfully extracted through image processing and associated functions. Sage has integrated this type of SRI vision enhancement software in several working prototypes and digital vision systems that were delivered to DoD in past efforts.