SBIR Phase II: Post-Quantum Cryptography in Resource-Constrained Devices

The broader impact/commercial potential of this Small Business Innovation Research (SBIR) Phase II project is to deliver state of the art cryptography and cybersecurity solutions to Internet of Things (IoTs) and embedded device designers, enterprise hardware and software vendors, and government contractors against the attack of classical and quantum computers. It has been widely accepted that quantum computers will have the ability to solve complex problems, the same complex problems many security algorithms are based on, exponentially faster than current computers. Even though no quantum computer with serious computing power has yet been built, large scale quantum computers are expected to become a reality within the next decade. We believe it is necessary to plan for the future as it takes years to change cryptosystem deployments due to network effects. This project plans to implement quantum-safe security solutions that will require the integration of quantum-safe software and/or hardware cryptographic solutions on resource-constrained devices used in embedded systems. As the landscape of connected devices changes how the world interacts, the dependence on these systems increases, increasing the possibility of exploiting security vulnerabilities. This project will expand the knowledge of efficient implementations of quantum-safe security solutions, of which little is currently known. This Small Business Innovation Research (SBIR) Phase II project will design, develop, and implement cryptographic algorithms that are suitable for small and resource-constrained devices employing hard and complex mathematical assumptions known to be classical- and quantum-safe. Long-term and lightweight security are two main parameters that need to be considered while deploying quantum-safe cryptographic algorithms in resource-constrained devices. Devices being manufactured today may still be around when quantum computers become available and thus need to be secure against them. We plan to employ a special class of quantum-safe algorithms based on maps on elliptic curves along with agile implementations of cryptographic coprocessors to achieve the required performance and security. Cryptosystems based on these maps are known to provide the smallest possible key sizes and their security level is determined by a single, simple parameter in comparison with other quantum-safe candidates. The hardware designs are taken through VLSI design flow to realize the integrated circuits that are evaluated for energy/power, area/performance, and security including side-channel analysis. The project will generate new insights and results about how to be safe and secure in the quantum era. This project will conclude with hardware and software implementations and test chip prototypes. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.