SBIR/STTR Research Award
FPGA Vulnerability Analysis Tools
Award amount
$139,998Program and phase
STTR · Phase IAward year
2019Award details
- Awarding agency
- Department of Defense
- Branch
- Navy
- Recipient company
- BLUERISC INC
- Proposal award date
- 2019-06-03
- Contract end date
- 2019-12-09
- UEI
- LVWLKDJURJL1
- Solicitation number
- 19.A
- Topic code
- N19A-T018
Research abstract
BlueRISC's proposed solution takes the form of an automated toolkit that is able to analyze an FPGA bitstream with respect to exploitability. The solution relies on an FPGA-agnostic framework for automatically reverse-engineering an FPGA-bitstream into an intermediate representation (IR). This IR is FPGA agnostic and enables a program-analytic framework for extracting a fundamental FPGA-centric Vulnerability Model which can be visualized in the form of an FPGA Exploitability Graph. The proposed toolkit will also provide remediation guidance.
Technology keywords
Not reported
Other awards by this recipient
Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.
- Large Language Models for System Security Engineering Analysis
- Navigation Warfare Situational Awareness with AI/ML
- Asymmetric LLM-aided Cyber Effects
- Navigation Warfare Situational Awareness with AI/ML
- Novel Processor Architectures for Probabilistic Computing in Survivability Controllers
Awards with the same topic code
Verified by an exact topic code match. This is not a text-similarity match.
Research funding history
60 SBIR/STTR records share this UEI (2003–2025). Reported award amounts total $29,565,062. Reported amounts are not federal obligations.
Phases: Phase I, Phase II
Agencies: Department of Defense, Department of Homeland Security, National Science Foundation, Department of Energy