Low-Power Radiation Tolerant 4GHz Bandwidth 16k Channel Spectrometer ASIC

Spectrometers currently employed by NASA include field programmable arrays (FPGAs), analog to digital converters (ADCs) and a number of other discrete components assembled on a printed circuit board (PCB). An application specific integrated circuit (ASIC) based spectrometer offers a great reduction in weight, volume and power consumption compared to the FPGA/PCB based implementation. This proposal aims to develop a low-power (LP) poly-phase spectrometer (PPS) ASIC. The proposed ASIC aims to achieve a 4GHz bandwidth and 8192 usable frequency bins. In order to implement the required functionality and meet the specifications while consuming below 1.5W of power, the proposed ASIC will include a state-of-the-art 6-bit ADC, a demultiplexer, a poly-phase filter bank, a windowing function, a fast-Fourier-transform core, a frequency-domain data analysis block, a data readout, a digital control unit and testing features. Tolerance to at least 500Krads of total ionizing dose (TID) radiation will be achieved by implementing the ASIC using an ultra-thin gate oxide CMOS technology. Low power consumption will be achieved by employing special multiplier-less-accumulators and multiplier-less-“butterflies”. The power consumption will be further reduced by minimizing the redundant states in the poly-phase filter’s FIR and IFFT block. Additional power-saving can be achieved by switching off the ASIC’s unused blocks, and by internally dividing the clock frequency. Phase I work provided the proof of feasibility of implementing the proposed spectrometer ASIC. Phase II will result in the silicon proven ASIC’s prototypes ready for commercialization in Phase III.