SBIR/STTR Research Award

Single-Chip DC-DC Converter for Harsh Environments

Award identifier e4ed6cd0b970d89013ccd327a6c5e00af98c80139c340d5ff3d451a8be59e23cAwarding agency National Aeronautics and Space Administration

Award amount

$124,846

Program and phase

SBIR · Phase I

Award year

2017

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Award details

Awarding agency
National Aeronautics and Space Administration
Branch
Not reported
Recipient company
Alphacore, Inc.
Proposal award date
2017-06-09
Contract end date
2017-12-08
UEI
CXMPDDLFBCH3
Solicitation number
Not reported
Topic code
S3.03

Research abstract

Alphacore Inc. will develop a digitally controlled, high switching rate, digital hysteresis based DCDC converter suitable for space and harsh environment applications. Alphacore will collaborate with ASU scientists to develop a RHBD, digital intensive, single-chip hysteretic DC-DC converter module to achieve: - Utilizing 180nm digital CMOS process, supporting up to 4.5V input supply, and up to 4A of load current utilizing a stacked power stage. - First all-digital hysteretic converter, achieving 10MHz switching rate, with reduced output component sizing - A digital slow-start (SS) option to sequence and daisy chain and sequence power supplies - Digitally controlled regulation loop parameters, including switching speed, hysteresis window, settling time The switching regulator will be fully digitally controlled, enabling portability across various process technologies. Alphacore's design provides a very fast transient response and high efficiency operation across the full load range of operation using digital. Having a fast-transient design is critical when operating a digital ASIC or FPGA that typically require a large amount of decoupling capacitance (lots of area on the board) to be able to respond to dynamic load change within their core. The main characteristics of this design are: 1 to 5 V input voltage, 0.8 - 4.5 V regulated output voltage, fully integrated, load current scalable power train, high efficiency (peak efficiency at 94%) digital hysteretic converter. The main deliverable of this research will be a single chip, all digitally hysteretic controlled solution, where a fully integrated all digital DC-DC point-of-load regulator with programmable hysteresis window will deliver a load current of 0.1A to 2A. Due to its fully integrated solution, the controller design will be 2.5x2.5 mm2 on a 0.13um 18um CMOS process. The converter will utilize drain extended power devices to achieve high voltage compliance.

Technology keywords

Not reported

Other awards by this recipient

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Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

155 SBIR/STTR records share this UEI (2013–2026). Reported award amounts total $63,784,604. Reported amounts are not federal obligations.

Phases: Phase I, Phase II, Phase II – Direct to Phase II

Agencies: Department of Defense, National Aeronautics and Space Administration, Department of Energy, Department of Commerce

Agency intelligence

National Aeronautics and Space Administration

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