SBIR/STTR Research Award

FLASHRAD: A 3D Rad Hard Memory Module For High Performance Space Computers

Award identifier c93402aa0e3513bccab3261300fa292200d77c291f69d7d8c63ad05937294042Awarding agency National Aeronautics and Space Administration

Award amount

$124,913

Program and phase

SBIR · Phase I

Award year

2017

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Award details

Awarding agency
National Aeronautics and Space Administration
Branch
Not reported
Recipient company
Irvine Sensors Corporation
Proposal award date
2017-06-09
Contract end date
2017-12-08
UEI
QS98AJNH3J28
Solicitation number
Not reported
Topic code
Z6.01

Research abstract

The computing capabilities of onboard spacecraft are a major limiting factor for accomplishing many classes of future missions. Although technology development efforts are underway that will provide improvements to spacecraft central processing units (CPUs) they do not address the limitations of current onboard memory systems. In addition to CPU upgrades, effective execution of data-intensive operations such as terrain relative navigation, hazard detection and avoidance, autonomous planning and scheduling, and onboard science data processing and analysis require high-bandwidth, low-latency memory systems to maximize processor usage (i.e. to overcome the "memory wall"). Copious amounts of data being generated on a mission require large amounts of non-volatile memory storage in order to store this data for transmission back to earth when power to do this operation is available. Furthermore, the memory system must be capable of providing the necessary operational robustness and fault tolerance required for space applications. In an effort to support the needs for NASA's High Performance Space Computer (HPSC), it is proposed that this research investigates the challenges and opportunities in developing a space-qualified, 3D Flash memory cube utilizing COTS memory devices supplemented with a custom Radiation-Hardened-By-Design (RHBD) controller. Focus would be on developing a NAND Flash memory module that could be used for SSRs to help increase the memory densities, lower power, lower cost and to achieve higher data throughput.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

186 SBIR/STTR records share this UEI (1983–2021). Reported award amounts total $64,762,800. Reported amounts are not federal obligations.

Phases: Phase I, Phase II, Phase II – Direct to Phase II

Agencies: Department of Defense, National Aeronautics and Space Administration, Department of Health and Human Services, National Science Foundation, Department of Homeland Security

Agency intelligence

National Aeronautics and Space Administration

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