SBIR/STTR Research Award

A Silicon Carbide Foundry for NASA's UV and High Temperature CMOS Electronics Needs

Award identifier 512059199a70914699390d7881e53487abdc7cab674ab123e2eb735cdf6b5bdaAwarding agency National Aeronautics and Space Administration

Award amount

$750,000

Program and phase

SBIR · Phase II

Award year

2017

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Award details

Awarding agency
National Aeronautics and Space Administration
Branch
Not reported
Recipient company
COOLCAD ELECTRONICS, INC.
Proposal award date
2017-05-05
Contract end date
2019-05-07
UEI
FJELK5N54RS3
Solicitation number
Not reported
Topic code
S1.04

Research abstract

CoolCAD Electronics has developed a patent-pending technology to design and fabricate Silicon Carbide (SiC) MOSFET opto-electronic integrated circuits (ICs). We both fully design and fabricate these SiC Opto-Electronic ICs in the U.S. using our own design methodologies, SiC process recipes and in-house fabrication facility. We will design, fabricate and test SiC Extreme, Vacuum and Deep Ultraviolet photodetectors. We will prototype PN Junction and Schottky barrier linear photodiodes, as well as low dark count avalanche photodiodes. We will design and fabricate a two-dimensional 256 by 256 passive UV SiC focal plane array. Array elements will be fabricated in-house, out of both PN junction and Schottky barrier detectors, using CoolCAD's process and facilities. We will design and fabricate opto-electronic integrated circuits, where we will integrate various types of detectors with a MOS operational amplifier into a single IC to actively convert the photo current to usable voltage levels. We will also design and fabricate an integrated photodetector and 3-Transistor pixel for active readout. Multiple active pixel readout 3-T circuits will be an array to form a SiC active pixel MOS Deep UV imager. Our in-house fabrication process will also be upgraded. We will automate optical alignment to improve our microfabrication resolution and reduce minimum feature size. We will perform gate oxide anneals to improve carrier mobility. Improving mobility and reducing the minimum feature size will increase MOSFET performance and increase speed of opto-integrated circuits. Furthermore, SiC allows for optoelectronic operation at high temperatures. We will test our circuits up to 500C and utilize special metal contact stacks to enhance high temperature reliability. Finally, we will make our in-house process available to NASA and provide a process development kit for use of our fabrication facility to prototype new application specific SiC integrated circuits.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

44 SBIR/STTR records share this UEI (2007–2025). Reported award amounts total $16,309,579. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: National Aeronautics and Space Administration, Department of Defense, National Science Foundation, Department of Energy

Agency intelligence

National Aeronautics and Space Administration

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