SBIR/STTR Research Award

A Low Power Rad-Hard ADC for the KID Readout Electronics

Award identifier 2da442e5f97dd14ac66ec32d9f6e237ce5894dea2f532d662f62186abe976b13Awarding agency National Aeronautics and Space Administration

Award amount

$125,000

Program and phase

SBIR · Phase I

Award year

2017

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Award details

Awarding agency
National Aeronautics and Space Administration
Branch
Not reported
Recipient company
PACIFIC MICROCHIP CORP.
Proposal award date
2017-06-09
Contract end date
2017-12-08
UEI
HRMGH9U56EQ1
Solicitation number
Not reported
Topic code
S1.04

Research abstract

The proposal aims to develop a radiation hardened analog-to-digital converter (ADC) required for the Kinetic Inductance Detector (KID) readout electronics. KIDs are developed for photometers and spectrometers for astrophysics focal planes, and earth or planetary remote sensing instruments. ADCs employed in space based KIDs are required to combine several features: radiation hardness, low power consumption, high resolution and high-sampling rate to facilitate increase in the number of the readout tones and to reduce the size of the electronics. The proposed SAR ADC aims to achieve a 12-bit resolution and the lowest to date reported figure of merit (FOM) at the 1GSps rate. A number of innovations will be introduced to the ADC in order to combine low power consumption (below 100mW) with the signal to noise and distortion ratio (SINAD) of at least 65dB. Tolerance to at least 4Mrads of total ionizing dose (TID) radiation and immunity to the single event effects (SEEs) will be achieved by employing radiation hardening techniques such as RHBD, RHBL and RHBS. A novel calibration technique for the capacitor mismatch will be introduced to improve linearity and increase the sampling rate. The proposed calibration technique introduced to the sub-ranging architecture with application of the asynchronous SAR logic will facilitate reduction of switching power. Phase I work will provide the proof of feasibility of implementing the proposed ADC. Phase II will result in the silicon proven ADC prototypes being ready for commercialization in Phase III.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

49 SBIR/STTR records share this UEI (2010–2025). Reported award amounts total $21,447,669. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: National Aeronautics and Space Administration, Department of Energy, Department of Defense, National Science Foundation

Agency intelligence

National Aeronautics and Space Administration

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