Irrefutable Tamper Evidence

In this Phase I SBIR project, The Athena Group, Inc., will develop an innovative technology to provide an irrefutable and unalterable logging facility for commercial-off-the-shelf (COTS)-based critical technology solutions without utilization of write-once memory. The proposed solution will be realized as a customizable intellectual property (IP) block that can be readily included in circuit card assembly, field programmable gate array (FPGA) and system-on-a-chip (SoC) designs, will consume minimal hardware resources, and will have a negligible impact on the performance of the device. Besides providing a secure logging facility, the IP block will also provide security services for the end application, relieving the application designer from the costly and time consuming task of implementing these functions in a secure manner. As an IP block that can be included in an FPGA or ASIC design, or realized as a standalone device, the costs and schedule risks of implementing the logging facility will be dramatically reduced.