Microelectronics Component Adhesive Selection and Design Rules for Failure Avoidance

Thermally induced fatigue and residual stress introduced during fabrication are sources of stress related failure in microelectronics, which raises concerns about product reliability and specification. CFDRC has teamed with experts in the reliability of microelectronics packaging to develop a testing and physics based modeling protocol to correlate material properties and thermal loading conditions to stress related failure. Specific outcomes will include: (a) experimental evaluation of adhesive bond performance under thermal stress conditions to characterize the impact of coefficient of thermal expansion (CTE) mismatches, (b) development and application of a testing protocol to quantify the CTE mismatch necessary to elevate stress and cause degradation, (c) parameterized physics-based models to simulate thermo-mechanical stress between bonded components, and (d) a fine-scaled physics-based damage model to relate thermo-mechanical stress to damage progression. This effort will address development of the test protocol and generation of data to parameterize models for the simulation of degradation. The end use of the testing and modeling protocol is to extract design rules and materials selection guidelines for polymer adhesives to allow microelectronics manufacturers to mitigate component failures related to CTE mismatch through improved designs and materials selection. Approved for Public Release 15-MDA-8161 (11 March 15)