Digital Readout Integrated Circuit for Infrared Focal Plane Array

The Digital Readout Integrated Circuit (DROIC) requirements include a small unit cell (12 ?m), a large well capacity (5 E +08 electrons), high resolution (> 20 bits), low power (< 150 mW @ 60 Hz), dual band operation, ability to operate at 1 kHz, and a high speed optical output. While most of the requirements listed above have been achieved separately, meeting these requirements simultaneously is very challenging. The key issue is that in traditional designs the capacitor that provides the well capacity fills the majority of the unit cell. In order to meet topic requirements a new architecture, smaller feature size process, 3D manufacturing, and a faster output have to be considered. Nu-Trek expects to meet all these requirements using its patent pending MultiMode architecture. The proposed DROIC, NT/DROIC/04, will also offer several combinations of resolution and speed that can be toggled between even on a frame-by-frame basis.