Digital Readout Integrated Circuit for Infrared Focal Plane Array

This proposal outlines a digital pixel readout integrated circuit to achieve extremely high dynamic range, high speed and elegant functionality for infrared focal plane arrays. This digital readout will be a complete camera-on-chip architecture when combined with a detector in a hybrid fashion. It will be capable of operating at cryogenic temperatures to support infrared detectors as well as room temperature to support the latest generations of visible or high operating temperature detectors. The final result will be easy to use and fully compatible with commercial frame grabbers and control electronics. The readout circuit will be implemented in a CMOS process with much more reasonable mask costs as compared to that of state-of-the-art line width processes, saving the government money and broadening the possible supplier base. The final product will be flexible enough to be used as a generic readout to support a wide variety of detector types across a broad swath of Army programs.