SBIR/STTR Research Award

Subranging ADC using a Hybrid Pipelined Architecture

Award identifier 3185f08ee504939ac6152acd8b58e9c8f6f1670d2b000d4cdfdbfc9aa63f0b8aAwarding agency Department of Defense · Navy

Award amount

$2,024,755

Program and phase

SBIR · Phase II

Award year

2013

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Award details

Awarding agency
Department of Defense
Branch
Navy
Recipient company
HYPRES INC
Proposal award date
2013-06-28
Contract end date
2016-09-30
UEI
Z3BBX7KX4WU5
Solicitation number
2009.2
Topic code
N092-154

Research abstract

The objective of this project is to develop a novel superconductor-semiconductor hybrid pipelined analog-to-digital converter (ADC) that provides up to 30 dB dynamic range extension over the state-of-the-art. The pipelined ADC architecture includes both superconductor and semiconductor analog-to-digital converters and mixed-signal inter-range circuitry. The motivation behind this superconductor-semiconductor hybrid-technology approach is to circumvent the limitations of each technology while taking full benefits of their respective strengths. In addition to developing the ADC, the input/output subsystem of the cryocooled digital-RF receiver will be improved to deliver the best performance from the high-dynamic range ADC.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

255 SBIR/STTR records share this UEI (1985–2025). Reported award amounts total $91,527,586. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: Department of Defense, Department of Energy, National Aeronautics and Space Administration, National Science Foundation, Department of Health and Human Services, Department of Commerce

Agency intelligence

Department of Defense

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