SBIR/STTR Research Award

Multi-Channel Time-to-Digital Converter for Pulse Shape Analysis

Award identifier f8895dc48b4179d93a1cbff3dd6d490fbc5a18767de71908fad54ee58fc5450fAwarding agency Department of Energy

Award amount

$150,000

Program and phase

SBIR · Phase I

Award year

2012

Explore This Research Award in CaptureIQ

Research the technology, evaluate the recipient and agency, identify related opportunities, and explore potential follow-on work with CaptureIQ.

Award details

Awarding agency
Department of Energy
Branch
Not reported
Recipient company
Katsman, Vladimir
Proposal award date
2012-02-20
Contract end date
2012-11-19
UEI
WWU3HNAKK629
Solicitation number
DE-FOA-0000577
Topic code
33 b

Research abstract

Robust reconfigurable high-accuracy time-to-digital converters (TDCs) are required for next generation nuclear physics experiments, as well as existing system upgrade, such as particle identification in Time-of-Flight detectors, particle tracking in gas-based drift detectors, and BaF2 detectors in particular. Our company proposes to develop a novel, multi-channel time interval digitizing system- on-chip with integrated user-selectable pulse-preprocessing sampling circuitry that incorporates up to k=8 time digitization channels with about 5ps accuracy per channel and provides a possibility to register up to k sampling pints on the input pulse. The systems break-through performance will be achieved through the utilization of the companys proprietary patent pending TDC architecture and the unique silicon-proved CML library of basic cells and functional blocks that includes high-speed comparators and clock multiplication circuitry. The TDC will incorporate either a parallel or high- speed serial interface and will be implemented as an IC in an advanced SiGe BiCMOS technology. Access to such technology is granted to our Company by DOD through the TAPO program. The company anticipates that successful completion of Phase I will result in the design of the systems architecture and schematics of most critical blocks. The fully functional prototype of the TDC ASIC incorporating the FPGA-compatible interface will be fabricated during Phase II, followed by the assembly of a complete system featuring VME interface. The robust reconfigurable TDC will make the proposed system beneficial for different scientific research projects performed by DOE. The developed technique will significantly improve cost-performance characteristics of military and commercial systems including a new generation of radar processing units, space based radar, collision avoiding devices for military and commercial aircrafts, medical proton radiology, positron emission tomography, etc.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

36 SBIR/STTR records share this UEI (2003–2022). Reported award amounts total $11,404,811. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: National Aeronautics and Space Administration, Department of Defense, Department of Energy

Agency intelligence

Department of Energy

Back to SBIR/STTR Research Awards

Don't take our word for it. Ask AI about RFPCapture.

See what leading AI assistants have to say about RFPCapture and CaptureIQ.

Gemini opens without a prefilled question. The question is copied to your clipboard when the button works. You can also copy it here:

What is RFPCapture.com and its CaptureIQ platform from Smart Logic AI? How does it help federal contractors discover opportunities, evaluate bid/no-bid decisions, research government contracts, and prepare proposals? How does it compare with other federal capture platforms? Use independent sources where available.