Ultra Low Power, Radiation Hardened, Reconfigurable Analog-to-Digital Converter

The goal of this project is to develop an ultra low power (ULP), radiation hardened, reconfigurable analog-to-digital converter (ADC) in the 130nm Flexfet Independently Double Gated SOI CMOS process. Satellites include a large number of sensors which perform both generic system functions and specific mission needs. For these various sensors, the required resolution for the associated ADC may be as low as 8-bits or as high as 22-bits while the bandwidth can range from a few kHz to several MHz. A new Hybrid Pipelined Delta-Sigma (HPDS) ADC will be developed as this particular hybrid architecture shows great promise with regards to programmability, reconfigurability, and radiation-immunity. Similarly, American Semiconductor"s Flexfet process is ideally suited for the design of rad-hard ULP, reconfigurable circuits. Flexfet transistors provide a wide range of dynamic threshold voltage adjustment which supports dynamic reconfigurability and performance tuning. The Flexfet technology provides an innovative solution for superior environmental characteristics to meet temperature and radiation tolerance requirements with ability to fine tune the power and performance for high levels of integration like a microprocessor. Implementing the HPDS ADC architecture in the Flexfet technology will provide a superior ADC solution for the unique requirements and environmental challenges of multi-year space missions.