SBIR/STTR Research Award

Field Programmable Gate Array (FPGA) Physical Unclonable Functions

Award identifier 2c78eec2c4111b7c3f5012932ea936399c5ec7f3668652b0c0c01f20e01324e0Awarding agency Department of Defense · Army

Award amount

$100,000

Program and phase

SBIR · Phase I

Award year

2011

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Award details

Awarding agency
Department of Defense
Branch
Army
Recipient company
SECURICS, INC.
Proposal award date
2010-12-20
Contract end date
Not reported
UEI
Not reported
Solicitation number
2010.2
Topic code
OSD10-A02

Research abstract

Physical Unclonable Functions (PUFs) are a less expensive and more secure alternative to the use of non-volatile memories to provide the secret storage. A PUF is a function that maps a set of challenges to a set of responses based on an intractably complex physical system. Given a fixed challenge, the corresponding response will vary across different ICs since the variations in the manufacturing process cause significant delay differences among different ICs. However, one major problem with current hard and soft PUFs is that they possess relatively low entropy. For this proposal Secuics is introducing a new increased entropy and unbiased PUF design based on basic existing"delay-based"but biased PUF elements. We call this new design a Pattern PUF. Compared to the basic PUF designs, the Pattern PUF allows an easier implementation for both ASICs and FPGAs, provides unbiased outputs, and provides an easier evaluation and expansion of the entropy while providing higher reliability/repeatability. The Pattern PUF circuit can be used as a random number generator (RNG) and a secret volatile key generator for cryptographic operations. A multi-bit PUF signature can be generated by running the circuit multiple times or by instantiating multiple instances of the Pattern PUF.

Technology keywords

Not reported

Awards with the same topic code

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Agency intelligence

Department of Defense

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