SBIR/STTR Research Award
Compensation of Superconducting ADC for Improved Accuracy
Award amount
$69,081Program and phase
SBIR · Phase IAward year
2010Award details
- Awarding agency
- Department of Defense
- Branch
- Navy
- Recipient company
- FTL Systems, Inc.
- Proposal award date
- 2010-05-10
- Contract end date
- 2011-03-09
- UEI
- MCJSGW2W4C76
- Solicitation number
- 2010.1
- Topic code
- N101-090
Research abstract
Real-time compensation techniques investigated in this effort can improve the precision and accuracy of Superconducting Analog to Digital Converters. Converters of interest include Sigma-Delta (BP and Wide/Base Band), Flash and Time-Interleaved Flash architectures. Compensation techniques utilize information beyond current real time samples, either from calibration operation or domain-specific information.
Technology keywords
Not reported
Other awards by this recipient
Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.
- Agile, Robust and Concurrent Cross-Correlation From HF Through Ka Band
- Streaming Data Capture, Processing and Network Access from Array of Superconducting Analog to Digital Converters
- Low-Jitter/Skew, Tunable, High Bandwidth Clock Generation and Distribution into Cyrogenic Environments
- Agile, Robust and Concurrent Cross-Correlation From HF Through Ka Band
- Array Clocking with Reduced Jitter Using Taped Delay Lines
Awards with the same topic code
Verified by an exact topic code match. This is not a text-similarity match.
- Backend Error-Correction Algorithm Unit for Superconducting ADCs
- Backend Error-Correction Algorithm Unit for Superconducting ADCS
Research funding history
11 SBIR/STTR records share this UEI (1997–2010). Reported award amounts total $3,479,765. Reported amounts are not federal obligations.
Phases: Phase I, Phase II
Agencies: Department of Defense