Adaptive Digital Receiver

This Small Business Innovation Research Phase I project demonstrates a wideband, wide dynamic range, adaptively controlled digital receiver architecture that is dynamically reconfigurable to optimize the performance for the current signal environment. The architecture takes advantage of several, proprietary, high-performance digital signal processing techniques to trade off bandwidth, resolution (SFDR and/or SNR), and power. These techniques can be changed on-the-fly for different operating modes or as signal conditions change. One technique, called Adaptive Parallel Combining (APC), uses a parallel array of high-speed, high-resolution analog-to-digital converters (ADCs) with adaptive signal combining to dramatically improve resolution (both SNR and SFDR) of the digitization while maintaining very high sample rate. A complementary technique, called Advanced Filter Bank (AFB) also uses an array of ADCs, but it greatly improves the bandwidth of the digitization while maintaining high resolution (e.g., four converters can be used to quadruple the bandwidth). Additional techniques include: linearity compensation to improve SFDR and increase analog input bandwidth; averaging of multiple ADCs to improve SNR; channel extraction to zoom in on a desired narrowband; channel matching to digitize multiple channels (e.g., antenna elements) with finely-matched gain and phase; and accurate I/Q demodulation. Using heuristic analysis techniques, this architecture dynamically activates the appropriate DSP techniques to provide optimal performance for the current mode of operation (e.g., for very wideband spectrum monitoring, the AFB and linearity compensation techniques can be used; alternatively, for zooming in on narrowband channels, the APC, averaging, and channel extraction techniques can be used to provide extremely high-resolution). This approach also supports simultaneous outputs (e.g., a wideband, lower-resolution signal for detection and a simultaneous narrowband, high-resolution signal for data analysis, both sharing the same exact same ADC hardware but simultaneously employing different DSP functions). The V Corp proprietary techniques have been proven to provide the highest speed, highest resolution analog-to-digital conversion available currently or in the foreseeable future (similar techniques have already been customized for and implemented in several next-generation communications receivers, RADAR systems, and SIGINT receivers). During Phase I, V Corp will demonstrate the capabilities and functionality of the wide dynamic range digital receiver architecture with adaptive control using data from state-of-the-art ADC chips using V Corp’s advanced DSP techniques to show beyond state-of-the-art performance (e.g., doubling or quadrupling the bandwidth of state-of-the-art digitization, improving the SNR and SFDR by 24 dB with linearity compensation and adaptive parallel combining). During Phase II, a real-time hardware prototype will be implemented. BENEFIT: This dynamically reconfigurable approach overcomes the critical digitization bottleneck which limits performance of state-of-the-art radio frequency transceiver systems. Many high-performance modern electronic systems will benefit from these techniques. Significant applications include enhancement of RADAR systems, SIGINT receivers, wideband universal RF transceivers, specialized test equipment, and medical imaging systems.