SBIR/STTR Research Award

LinComp High-Performance Linearity Error Compensator

Award identifier da98c976b4e84c9e2e431ec1855ae0ce4e87ff4febe6e431ab79f7da1ed30ecfAwarding agency Department of Defense · Army

Award amount

$498,748

Program and phase

SBIR · Phase II

Award year

2009

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Award details

Awarding agency
Department of Defense
Branch
Army
Recipient company
V CORP. TECHNOLOGIES, INC.
Proposal award date
2009-06-02
Contract end date
2011-06-21
UEI
HLEJMS3GMGT9
Solicitation number
2001.1
Topic code
SB011-012

Research abstract

This SBIR Phase II project demonstrates a breakthrough approach to high-resolution linearity error compensation (LinComp) using computationally-efficient digital signal processing to reduce harmonic and intermodulation distortion in analog-to-digital converters (ADCs) by up to 24 dB. The core technology can also be used to reduce such distortion in digital-to-analog converters (DACs), sampling circuitry, and radio frequency amplifiers or the combination of these devices in the complete RF chain. This technology improves the dynamic range by up to four bits, enabling very accurate conversion of data at high intermediate frequencies (IF) with very high sample rates (e.g., distortion below -65 dBFS with 1.5 GHz sample rate, direct IF sampling at 1.2 GHz). The LinComp technology reduces the size, power, and cost of radar systems and RF transceivers by eliminating RF downconversion electronics. The highly innovative LinComp processing will be demonstrated in real-time FPGA hardware and fully tested with two different manufacturers’ ADC chips (e.g., MAXIM MAX108, and Atmel AT84AS003), providing 1.5 GHz sample rate, 8 to 10 bit resolution, and direct IF wideband sampling in the second Nyquist zone. The LinComp processing will be implemented in a Xilinx Virtex 4 FPGA. Innovative parallel digital signal processing techniques will be used to provide the full 1.5 GHz data throughput by partitioning the processing into multiple, simultaneous data streams within the FPGA. V Corp has confirmed the technical efficacy of the LinComp processing methodology by testing with state-of-the-art analog-to-digital and digital-to-analog converters. V Corp has executed a highly successful DARPA sponsored SBIR Phase I project demonstrating LinComp’s technical viability. This compensation approach requires less hardware, provides much better dynamic range, and provides compensation over a wider bandwidth than competing linearity compensation methods. Very importantly, the LinComp processor will always exceed the state-of-the-art because it is extremely adaptive and can easily be applied to new, higher performance ADC, DAC, and amplifier products as they become available in the future. V Corp has relationships with many commercial companies such as MAXIM, Raytheon, General Dynamics, Northrop Grumman, and others who have expressed strong commercial interest in LinComp (testimonials included in proposal).

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

21 SBIR/STTR records share this UEI (1999–2011). Reported award amounts total $8,251,558. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: Department of Defense

Agency intelligence

Department of Defense

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