Design-Hardened Radiation Tolerant Microelectronics

Producing components that satisfy all of the BMDS space and interceptor environment specs traditionally has been not only costly but also untimely. One of the most difficult design constraints is making the components unaffected by the radiation environments of space. We propose to develop and demonstrate a radiation hardened ASIM3 in the IBM 9FLP process. This will be accomplished using the Structured ASIC fabric developed on another AFRL SIBR topic. BENEFIT: If a Phase II and Phase III options are exercised for this proposal the AFRL and other DoD systems will have access to radiation hardened ASIM. As older process become obsolete or their “Trusted Foundry” status changes the space community will be forced to migrate to different foundries and processes. This Phase II effort will show the Aerospace community that getting radiation hardened integrated circuits is now quick turn and inexpensive compared to traditional methods of design. This flow will be very analogous to FPGA development which will enable FPGA designers to produce hardened electronics with minimal radiation effects knowledge.