SBIR/STTR Research Award

High-Speed Metallic Interconnects in Multilayer Rigid FR4-Printed Circuit Board (PCB)

Award identifier 3f8d81bbd37b960feddf9e6522e49da11a19eeb190a92f30a482d7f96e0a0d8eAwarding agency Department of Defense · Defense Advanced Research Projects Agency

Award amount

$749,998

Program and phase

SBIR · Phase II

Award year

2008

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Award details

Awarding agency
Department of Defense
Branch
Defense Advanced Research Projects Agency
Recipient company
BANPIL PHOTONICS Inc
Proposal award date
2008-08-28
Contract end date
2010-09-30
UEI
XN67SGSDNQJ9
Solicitation number
2005.2
Topic code
SB052-021

Research abstract

This Small Business Innovation Research (SBIR) Phase II project will develop an innovative high speed metallic interconnects technology for chip-to-chip interconnects utilizing standard material (e.g. FR4). With the continued growth in the integration density of CMOS (complementary metal-oxide semiconductor) and clock frequency of microprocessors (on-chip), the aggregate bandwidth required between future-generation microprocessors and chipsets will increase sharply. Driving serial or parallel data at high speed over copper on FR4 based printed-circuit boards (PCBs) (off-chip) is becoming a severe design constraint and must be overcome to fully utilize the chip performance and significantly enhance the system-performance. The proposed electrical interconnects technology can be implemented into standard FR4-PCB, thereby utilizing standard manufacturing processes, and could increase the signal carrying capacity over 20 Gb/s, more than 5 times that of standard interconnects technology. Implementing the proposed metallic interconnect technology will eliminate the need to use non-standard material(s) in PCB or active components inside integrated circuits (IC) to obtain similar results, which will in turn decrease the complexity, cost, and total power-budget of the system. The purpose of this project is to develop high speed metallic interconnects by using standard-PCB friendly to manufacturing processes, which can be utilized as a common platform technology for a wide range of electronic applications and can extend the usage life-cycle of standard FR4 material and standard manufacturing processes for the next 20 years. The proposed high speed metallic interconnects will have enormous advantages for various next generation applications, including high speed PCs, servers, networking systems, gaming machines, communication systems, imaging and video systems, etc. The U.S. faces an unknown set of challenges in the area of high speed interconnects (PCB). Most board-level and related product-oriented work is being shifted offshore; therefore, no development efforts are being undertaken in U.S. industries. The U.S. share of the $45 billion world market dropped from 62 to 8 percent in the last 10 years. This project will develop the electrical interconnects on FR4-based printed circuit board (PCB) to drive the signal more than 10 Gb/s per channel, which will have profound influence on the competitiveness of U.S. industry. The development of the proposed interconnect technology will enable a large number of end users to take advantage of economies of scale by inexpensively manufacturing this high speed board and to leverage development costs to create the general software, analysis, and information technology infrastructure that will make such systems powerful, inexpensive, and deployable in huge numbers. Banpil’s goal is to create and develop high speed metallic interconnect technology for such a platform. This project will enable the development of this proposed high speed electrical interconnect solution in FR4 based PCB to meet industry needs in a timely manner. Banpil has the opportunity to lead the industry in development work through Phase II project and create global leaders in the area of high speed electrical interconnects.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

23 SBIR/STTR records share this UEI (2005–2020). Reported award amounts total $6,387,560. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: Department of Defense, National Aeronautics and Space Administration, National Science Foundation

Agency intelligence

Department of Defense

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