Engineered Substrates for “Zero-Penalty” Radiation Hardening of Ultra Deep Submicron Commercial Processes

We have developed engineered epitaxial layers based on nanostructure technology that can potentially harden commercial silicon devices against radiation by minimizing collected photocurrents (electron-hole pairs) via recombination centers. Adding recombination centers in CMOS devices is a well-known technique for reducing the collected charge; however, attempts at manufacturing a device with this property has lead to unsatisfactory levels of leakage current. Because of these leakage currents, efforts at hardening devices without special processing or design changes have been focused on buried regions, such as buried guard-rings. While buried regions can improve single event response by truncating funneling, electron-hole pair yield is largely unaffected in the active and silicon/silicon dioxide regions. During the Phase I portion of this effort, we will demonstrate the enhanced recombination benefits of such engineered material, using wafers provided by Texas Instruments (TI) at no cost to the program. During a Phase II program, we will optimize the nanostructure film for use in various TI fabrication facilities. Radiation Assured Devices in Colorado Springs, CO will perform all the radiation exposures and electrical testing.