Characterization and Mitigation of Radiation Effects in High-Speed Compound Semiconductor Microelectronics

For ultra high speed applications in DoD satellite systems, devices and circuits fabricated from III–V semiconductor compounds offer significant advantages over silicon-based technology in terms of operating speed and power. However, the uncertainty in single-event-effect (SEE) response of compound technologies forces the use of empirically-based hardening techniques with penalties in increased power, area, and weight. To enable better characterization and mitigation of SEEs in III-V technologies, CFDRC, in collaboration with Northrop Grumman Corporation (NGC) and Naval Research Laboratory (NRL), proposes the following innovations: (a) Accurate and cost-effective modeling of radiation effects in advanced high-speed III-V devices and circuits, enabled by enhancements to CFDRC’s NanoTCAD 3D/mixed-mode simulator; (b) New, more precise, charge generation models to complement the latest laser-based experimental techniques; (c) Simulation-supported design and validation of minimally-invasive mitigation techniques for SEEs. In Phase I, a representative advanced compound MMIC (Monolithic Microwave Integrated Circuit) will be used for ‘proof-of-concept’ characterization of SEEs (single-event upset/transient) by means of 3D/mixed-mode simulations, validated on a relevant high-speed mixed-signal circuit from NGC. Plans for SEE mitigation methods will be developed. In Phase II, the simulation efficiency will be significantly improved by adaptive 3D meshing, parallelization algorithms, and distributed mixed-mode computing. SEE mitigation methods for III-V ICs will be numerically explored, verified, and demonstrated.