High Fidelity Scene Generation for Distributed Hardware in the Loop of BMDS Components

With the goal of incorporating a variety of Missile Defense assets into a "network of test", CG2 Inc proposes to investigate, experiment and formulate proof-of-concept designs based upon its pre-existing per-pixel synchronization technology. This synchronization technology, called nVSync Pacing, adapts commercial-off-the-shelf graphics components to the unique variable frame-rate requirements of hardware-in-the-loop missile guidance scenario validation. The ultimate goal is the test and validation of a "theater level" subset of some of the following MDA systems: command and control, missile warning, intelligence processing, sensors (multiple passbands), signal processing, target discrimination, hardware-in-the-loop test, battle management, and kill assessment. We propose a heterogeneous system consisting of both local-area and wide-area networking interfaces. We propose to include "portal" where a DIS, HLS or TENA protocol can be interfaced to a synchronization topology that would synchronize the local laboratory with remote facilities. To establish a measure of success, CG2 proposes to measure the latency of proposed inter-laboratory links, and measure and optimize the throughput requirements for test scenarios.