High Speed Readout Focal Plane Array (HSRFPA)

Systems & Processes Engineering Corporation (SPEC) proposes an advanced hybridized detector Readout Integrated Circuit (ROIC) single chip solution that supports traditional sensor array and ROIC configurations of different detector wavelengths, but also an integrated detector and ROIC configuration enabling a single chip LADAR receiver solution. SPECs High Speed Readout Focal Plane Array (HSRFPA) is a high-speed capture, high-speed readout focal plane array processing chip that has internal processing block functions with configurations and timing sequences that are user selectable and controllable using external control and clocking inputs. The HSRFPA single chip detector and ROIC solution can be fabricated using a low cost standard CMOS process. The HSRFPA solution offers detection wavelengths and ROIC processing frequencies in a standard CMOS process that would normally require fabrication of diodes in an expensive Silicon/Germanium process. The development of coherent acoustic sensing LADAR¡¦s requires a ROIC which can support a 32x32 pixel array, and not only capture data at a 1 to 2 Giga Sample per second rate with a 256 deep sample depth, but also digitize and read the data off chip within 100ƒÝ seconds. This same ROIC can also support 3D imaging LADARS, either simultaneously or as stand-alone systems.