Advanced, Low Cost, Integrated Avionics

The deliverable for this effort will be a coded algorithm to run on LMSSCs SPAR-16X processor that is targeted for the prime contractor’s architecture for mid-term THAAD. The algorithms generated herein offer an opportunity to eliminate or reduce transformations and frame sums in the THAAD image-processing pipeline. This Phase II effort will impact seeker sensitivity in a place where image-processing algorithms are weak - the preprocessor. This is the most cost effective and lowest risk location within the optoelectronic system to make alterations improving overall system performance. The sensitivity gain is accomplished by a neural network operating on low SNR data. Operating in the SNR range of 2 may increase seeker acquisition range as much as 70%. This technology complements other efforts that stem the flood of unwanted data and regain lost bandwidth and leverages IRAD projects at Lockheed Missiles and Systems Company to address electro-optic challenges presented by the THAAD project. Previously developed neural network (NN) algorithms will be tested on low SNR single frame THAAD data at or near readout. The SBIR deliverable will be ready for integration on flight hardware. A Polaris developed processor testbed will be delivered to support demonstrations and MDA applications.