SBIR/STTR Research Award

A Very High Speed TeraByte Solid State Mass Memory Implemented with Stacked Die

Award identifier d8f3009ecb5a3816fd52082e29fbac37882e46346982485f3f92232e1c5993b4Awarding agency Department of Defense · Navy

Award amount

$147,076

Program and phase

SBIR · Phase I

Award year

2006

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Award details

Awarding agency
Department of Defense
Branch
Navy
Recipient company
Controlex Corporation
Proposal award date
2006-02-02
Contract end date
2006-08-02
UEI
EBJZK4EBABL8
Solicitation number
2005.3
Topic code
N05-141

Research abstract

Proposed is the use of breakthrough technique to develop a TeraByte solid state mass memory (SSMM)for network-centric avionic applications. The memory portion will be implemented with 16 high multiple die stacks. Transfer rates of 250MBytes/S are achieved by a novel scheme for interleaving banks of NAND flash chips. The proposed SSMM is a dual port unit, supporting PCI Express and legacy 1553 ports. Extensive use is made of proprietary IP ported to FPGAs to handle complex memory management and I/O activities

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

7 SBIR/STTR records share this UEI (1994–2012). Reported award amounts total $2,153,608. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: Department of Defense

Agency intelligence

Department of Defense

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