EPITAXIAL GALLIUM-ARSENIDE ON SILICON-ON-INSULATOR WAFERS

THE NEED FOR LARGE-AREA GALLIUM-ARSENIDE (GAAS) WAFERS FOR ELECTRONIC AND OPTOELECTRONIC DEVICES IS BEING ADDRESSED THAT ARE SUITABLE FOR MONOLITHIC INTEGRATION OF BOTH GAAS AND SILICON (SI) RADIATIONHARDENED FUNCTIONS. THE GROWTH OF GAAS IS BEING INVESTIGATED BY ORGANO-METALLIC CHEMICAL VAPOR DEPOSITION ON SILICON-ON-INSULATOR (SOI) WAFERS PREPARED BY ZONE MELTING RECRYSTALLIZATION (ZMR). THE USE OF ZMR SOI WAFERS FOR GAAS GROWTH PROVIDES A SI LAYER OF HIGHER PURITY AND CRYSTALLINE QUALITY AT A SIGNIFICANT LOWER COST THAN COMPETING TECHNOLOGIES. THE FEASIBILITY IS BEING INVESTIGATED OF EPITAXIAL GROWTH OF GAAS ON ZMR SOI SUBSTRATES. SEEDING IS BEING USEDTO PRODUCE A SLIGHTLY MISORIENTED RECRYSTALLIZED SI FILM THAT WILL BE USED FOR GAAS ON SI GROWTH. THE ELECTRICAL AND STRUCTURAL PROPERTIES OF THE GAAS LAYER ARE BEING COMPARED TO GAAS GROWN ON BULK SI, SIMOX (SEPARATION BY IMPLANTATION OF OXYGEN), AND SILICON-ON-SAPPHIRE SUBSTRATES. RESEARCH IN A LATER PHASE WOULD BE CARRIED OUT TO FURTHER OPTIMIZE GROWTH PROCESS AND TO EVALUATE DEVICE PERFORMANCE. WHEN SUCCESSFUL, THIS APPROACH WOULD MAKE POSSIBLE THE INTEGRATION OF RADIATION-HARDENED SI INTEGRATED CIRCUITS WITH GAAS ELECTRONIC AND OPTOELECTRONIC FUNCTIONS. SUCH WAFERS COULD ALSO BE EXPOLITED FOR THEFABRICATION OF FOCAL PLAN ARRAY DETECTORS BY COMBINING SOI CIRCUITRY WITH GAAS DETECTORS OR HGCDTE DETECTORS EPITAXIALLY GROWN ON THE GAAS LAYER.