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Award details
- Awarding agency
- Department of Defense
- Branch
- Army
- Recipient company
- NOKOMIS INC
- Proposal award date
- 2024-12-05
- Contract end date
- 2025-06-09
- UEI
- YAPUZLNJ1856
- Solicitation number
- 24.4
- Topic code
- A244-042
Research abstract
Spiking Neural Network (SNN) is an event-driven artificial neural network through the precise timing of spikes. In SNN operation, the artificial neurons will proceed for activation when the input signal reach a certain value and idle otherwise. The event-based sampling of SNN is an asynchronous sampling that will produce nonuniformly time-spaced samples. Continuous-Time Digital Signal Processing (CT-DSP), which is a mixed signal processing, will perform event-triggered sampling to convert the input analog signal to nonuniformly time-spaced signal samples. The front-end asynchronous sampling of SNN can be realized by the asynchronous Analog-to-Digital Conversion (ADC) processing of CT-DSP. There are several merits of using CT-DSP over conventional DSP. In the conventional DSP, ADC converts analog signals to digital counterparts with a fixed sampling rate. To produce a high-resolution digital signal from the analog signal, the fixed ADC sampling rate has to be high, and the number of quantization bits also has to be large to minimize the quantization error. However, there is a tradeoff between sampling rate and number of quantization bits in conventional ADC. Thus, quantization error, which is the major noise elevating the overall noise beyond the thermal noise, is inevitable in conventional ADC process. The ADC in CT-DSP is asynchronously operative when the acquired signal’s magnitude crosses one of the pre-defined quantization levels, and idle when the acquired signal’s magnitude does not cross any of the pre-defined quantization levels. Thus, the CT-DSP with asynchronous ADC process provides enormous increase in energy efficiency over conventional DSP processes, making it ideally suited for real-time processing in power and time-constrained environments. In addition, there is no fixed sampling rate in CT-DSP’s asynchronous ADC because the sampling rates are instantaneously set and depend on the level-across quantization levels. Because the asynchronous ADC exactly quantizes the input analog signal in CT-DSP, there is no quantization error generated from the asynchronous ADC process. Thus, there is no quantization noise elevating the overall noise from thermal noise in CT-DSP.In this SBIR, Nokomis will develop a continuous-time SNN programmable array based on CT-DSP architecture and its Integrated Circuit (IC) design. The nonuniform signal data collection of continuous-time SNN front-end process can be realized by asynchronous level-crossing ADC sampling, which has been explored and assessed by Nokomis for CT-DSP front-end technology development. The continuous-time SNN back-end process is a conventional neural network with sparse connectivity, whose implementations and operations in Field Programmable Gate Arrays (FPGA), Field Programmable Analog Arrays (FPAA), and analog memory programmable platforms will be investigated in this Phase I SBIR.
Technology keywords
Not reported
Other awards by this recipient
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Awards with the same topic code
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Research funding history
123 SBIR/STTR records share this UEI (2005–2025). Reported award amounts total $66,765,345. Reported amounts are not federal obligations.
Phases: Phase I, Phase II, Phase II – Direct to Phase II
Agencies: Department of Defense, National Aeronautics and Space Administration, Department of Energy, Department of Health and Human Services, National Science Foundation, Department of Homeland Security
Agency intelligence
Department of Defense
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