SBIR/STTR Research Award

Space Qualified, 3D-Printed, Electronic Assembly Demonstration (SPEAD) Printed Circuit Boards

Award identifier d476cab00c7ae2c0bfc8cfd187385e3e0f4bdb1018e2d8760696dc70ef9d7f3aAwarding agency National Aeronautics and Space Administration

Award amount

$156,472

Program and phase

STTR · Phase I

Award year

2023

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Award details

Awarding agency
National Aeronautics and Space Administration
Branch
Not reported
Recipient company
NANOHMICS INC
Proposal award date
2023-07-20
Contract end date
2024-09-02
UEI
K39ENMXNLA73
Solicitation number
STTR_23_P1
Topic code
T12

Research abstract

Recent advances in techniques for Additively Manufactured Electronics (AME) have the potential to produce electronics assemblies that are uniquely compact and conformable, but these techniques have not been proven effective for space applications. Designing and fabricating printed circuit boards (PCBs) that can meet rigorous space flight qualifications specifications is challenging. There are currently no additive manufacturing technologies that can produce PCBs that meet the temperature cycles, shock, vibration, radiation, vacuum, and electromagnetic interference and compatibility requirements. Nanohmics, Inc., in collaboration with Professor Maggie Chen at Texas State University, proposes to leverage advances in 3D printing and photonic curing, materials engineering of highly conductive inks, and integration techniques to demonstrate Space-Qualified, 3D-Printed, Electronic Assembly Demonstration (SPEAD) PCBs. Specifically, the team will demonstrate highly conductive traces fabricated using advanced graphitic inks and novel aerosol inkjet printing, laser-sintered process. In the Phase I effort, the team will demonstrate a SPEAD PCB prototype by designing and fabricating a series of test circuits using graphitic ink on Kapton substrates. The graphitic ink component is based on a high conductivity (6.25x105 S/m) and temperature (gt;300deg;C) material. These test circuits will be based on the design of previously space qualified hardware. The prototypes PCBs will demonstrate the integration of commercial-off-the-shelf (COTS) integrated circuits (ICs) in standard surface mount packages with high conductivity traces on a flexible, high temperature substrate. In the Phase II effort, the team will focus on expanding the capabilities of the SPEAD PCB manufacturing process to provide new capabilities, such as multiple layers, integration of passive components, and demonstration of 3D integration to reduce overall component assembly volume.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

306 SBIR/STTR records share this UEI (2003–2025). Reported award amounts total $109,302,435. Reported amounts are not federal obligations.

Phases: Phase I, Phase II, Phase II – Direct to Phase II

Agencies: Department of Defense, National Aeronautics and Space Administration, Department of Energy, Department of Health and Human Services, Department of Homeland Security, Department of Agriculture

Agency intelligence

National Aeronautics and Space Administration

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