SBIR/STTR Research Award

Broadband Real Time IP-Based Architecture for Vehicle Electronics

Award identifier d60245ed07ee2f73f583e79630431c082fc81d0bdba3e917eb305121cf424a87Awarding agency Department of Defense · Navy

Award amount

$246,481

Program and phase

SBIR · Phase I

Award year

2023

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Award details

Awarding agency
Department of Defense
Branch
Navy
Recipient company
INTELLISENSE SYSTEMS INC
Proposal award date
2023-07-13
Contract end date
2024-09-22
UEI
C4Y5CNN55L37
Solicitation number
23.1
Topic code
N231-008

Research abstract

The U.S. Navy is seeking development of an open protocol and software and hardware solution to support the use of IP devices (e.g., an Ethernet-enabled sensor with an Ethernet-enabled mission computer system) over a STANAG-7221 link without interfering with a MIL-STD-1553 connection being used concurrently. To address this Navy need, Intellisense Systems, Inc. (Intellisense) proposes to develop a new Broadband Real Time IP-Based Architecture for Vehicle Electronics (BRAVE) plug and play module based on the unique adaptation of existing System on Chip (SOC) commercial PHY IP and VITA standards. All BRAVE circuit developments will be supported by Systems Modeling Language (SysML) digital modeling. Specifically, the innovative adaptation of existing VITA and modular open systems architecture (MOSA) standards and SysML modeling tools achieves a plug and play solution without any required user configuration once installed. In Phase I Intellisense will create and demonstrate the feasibility of a real-time broad band data bus capable of supporting legacy MIL-STD-1553 simultaneously supporting STANAG-7221 while also demonstrating transmission of data at a higher data rate with higher bandwidth traffic on a common data bus. Methods for bridging data and providing link status will be investigated. Issues associated with using STANAG 7221 will be investigated, and mitigation plans will be developed. The Phase I effort will include prototype plans to be developed in Phase II. In Phase II, we will further enhance the design and develop a prototype hardware solution with integrated software, which can drop in and provide IP connectivity at STANAG 7221 speeds over MIL-STD-1553 bus with no manual configuration required.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

337 SBIR/STTR records share this UEI (2014–2026). Reported award amounts total $162,560,474. Reported amounts are not federal obligations.

Phases: Phase I, Phase II, Phase II – Direct to Phase II

Agencies: Department of Defense, National Aeronautics and Space Administration, Department of Homeland Security, Department of Energy, Department of Commerce, Department of Agriculture

Agency intelligence

Department of Defense

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