Low-Power 28GHz Selective Spectrometer

Pacific Microchip Corp. proposes to develop a 28GHz spectrometer ASIC including an 8-bit 56GS/s ADC coupled with a digital back-end for a digital poly-phase filter based parallelized Fast Fourier Transform (FFT) processing of a selected portion of the signal#39;s spectrum. To achieve the 28GHz signal bandwidth, a previously developed 8-bit 56GS/s ADC with architectural enhancements will be employed. The introduced enhancements minimize the time interleaving mismatches which results in significant reduction of unwanted artifacts in the output spectrum. Instead of overdesigning, when seeking to maximize the performance, the ADC will rely on parameter calibration using a built-in CPU. On-chip phase locked loops (PLLs) will be used for clock synthesis. For convenient interfacing with field programmable gate arrays (FPGAs), the ASIC will include a high-speed LVDS data interface for result readout and an I2C interface for the ASIC control. Phase I work provided the proof of ASIC feasibility ndash; critical blocks were implemented and verified at the targeted technology node. At Phase II, the proposed ASIC will be designed, fabricated, tested, and developed ASIC samples will be provided.